Huawei held a conference on Kirin chips, announcing the Kirin 9050 series

On October 12, Huawei held a Kirin chip technology exchange meeting in Shanghai, marking the first chip-level technical communication meeting in six years, and systematically introduced the mass production progress of logic folding. Xu Songyu, head of the semiconductor business wireless terminal chip product management department, introduced that the Kirin chip has entered the testing phase in 2027, and the test results meet expectations; since 2023, the cumulative shipment of terminal products based on the Kirin chip has exceeded 100 million.

The Kirin 9050 series is the first Kirin chip built on logic folding technology. Xu Songyu explained that logic folding is not simply stacking multiple chips, but rather a systematic design from a three-dimensional perspective at the beginning of the design, treating multiple dies as a complete chip for collaborative design. This series features over 50 million hybrid bonds, with effective signal interconnections exceeding 5 million, and a transistor density increase of 53.5%. The CPU large core efficiency of the Kirin 9050 Pro has improved by 41%, and the NPU computing power has increased by 140%; the current hybrid bonding pitch is 1.5 microns, and Huawei plans to further reduce it to 1 micron by 2027.

The architecture of the Kirin 9050 Pro announced at the meeting includes the new generation Lingxi CPU, Maliang GPU, and Da Vinci architecture NPU, among others. This series is aimed at Mobile Agent, adopting a collaborative architecture of a large brain and a small brain on the edge, supporting the operation of a 30B MoE large model on the edge. The new generation Lingxi CPU features a 9-core 16-thread design, with a 23% improvement in multi-core performance, and the new generation Maliang GPU has a 40% performance increase.