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first_img Lei Jun announces the release of the Xuanjie O3, O100, and D100 chips

Lei Jun announced that Xiaomi's new generation of the Xuanjie family of chips, Xuanjie O3, Xuanjie O100, and Xuanjie D100, have all completed back-plate verification. Xuanjie O3 is an AI flagship SoC aimed at the highest-end products and will debut on the Xiaomi 18 Fold; Xuanjie O100 is a 1.22TB/s high-bandwidth AI acceleration chip, and Xuanjie D100 is the first domestic 3nm intelligent driving high-performance AI chip, with the latter two set to officially launch next year. The three chips cover the AI computing power needs of Xiaomi's entire ecosystem of people, vehicles, and homes.Xuanjie O3 uses a 3nm process, has an area of 133mm², and a transistor count of 24 billion, which is a 26% increase over the previous generation, with an AnTuTu extreme score reaching 5.22 million. The CPU features a ten-core all-large-core design, with a maximum frequency of 4.35GHz, Geekbench single-core score of 3945, and multi-core score exceeding 15000; the GPU has 16 cores and supports ray tracing, with significant improvements in multiple graphics performance metrics and a 64% reduction in power consumption compared to the previous generation. This chip is the industry's first to support LPDDR6, with an NPU tensor computing power of 200TOPS, and is specifically optimized for large language model inference.Xuanjie O100 is the world's first 6nm 3D wafer-level stacked AI acceleration chip, utilizing wafer-on-wafer packaging and hybrid bonding, with two layers of AI-specific high-speed DRAM and one layer of high-performance NPU stacked vertically, achieving a bandwidth of 1.22TB/s. Together with O3, it can achieve a maximum local AI inference speed of 330 Tokens/s. Xiaomi has restarted its large chip research and development for over five years, with a cumulative investment exceeding 21 billion yuan and a chip team of nearly 3000 people.

hot_img Samsung Electronics plans to repurpose the NRD-K R&D production line for wafer foundry use, aiming for mass production of 2nm base chips for HBM

According to South Korean media ZDNet Korea, Samsung Electronics is adjusting the original purpose of its NRD-K Line 2 at the Giheung campus from a research and development facility to a wafer foundry line, with the main target product being the 2nm base chips required for NVIDIA's HBM. This production line is expected to be operational in the second half of 2028, adopting a "Send-Fab" model, which involves receiving wafers from other mass production lines and performing specific processes.NRD-K is the most advanced composite research and development campus built by Samsung Electronics to seize future semiconductor technology, with a total investment of approximately 20 trillion won, planning for three production lines, of which the first line is scheduled to be completed by the end of 2024. This adjustment aims to proactively respond to the expansion of HBM demand driven by investments in AI infrastructure. Samsung plans to first apply the 2nm process to custom HBM and HBM5 to maintain performance advantages.Industry insiders point out that the scale of NRD-K Line 2 is relatively small, making it suitable for operation in the Send-Fab format. However, there are still about two years until the production line is operational, and the final purpose may be adjusted again based on market conditions. Samsung had previously considered using this production line for DRAM production, but after modifications to the relevant plans this month, DRAM capacity will be more concentrated in the Pyeongtaek campus. Equipment procurement orders have not yet been officially issued.

Data: The high-position chips of BTC in 2025 have decreased by 41.5%, and the market's maximum supply pressure may be easing

On-chain analyst Murphy stated that currently, all chips bought in BTC in 2025 are basically in a state of loss. Therefore, apart from wallet migrations, the reduction in the scale of 2025 chips likely means that holders are cutting losses and selling. Data shows that as of now, approximately 4.77 million BTC chips bought in 2025 remain, a decrease of 41.5% from the peak in December last year.From the downward trend, this group has experienced two phases: a rapid decrease in chips before February this year, and a significant slowdown in the rate of decline after February, although it still maintains a certain slope. Murphy believes that the 2025 chips may be the largest potential supply side in the current market scale. In contrast, the BTC chips formed in 2024, 2023, and 2022 have basically completed the release of high-level locked positions due to still having unrealized gains, and the slope of the curve is gradually flattening, indicating that the selling pressure from long-term holders is weakening.Historical data shows that during the bottom phases of the past two bear markets, high-level chips have shown a significant decline: at the bottom of the bear market in 2022, the chips bought at high levels in 2021 decreased by about 51%; at the bottom of the bear market in 2018, the chips bought at high levels in 2017 decreased by about 62%. If we refer to historical cycles, Murphy believes that in this bear market bottom phase, the reduction of high-level chips in 2025 may be in the range of 50%-60%, and the current decline of 41.5% indicates that there is still some room for release. However, this judgment has not yet considered the BTC bought by institutional investors such as spot ETFs and MicroStrategy, as this portion of chips is mostly in a long-term locked state, which may reduce the actual market supply pressure.
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